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E2E1023-27-Y3
Semiconductor MSM80C154S/83C154S
Semiconductor CMOS 8-bit Microcontroller
This version: Jan. 1998 MSM80C154S/83C154S Previous version: Nov. 1996
GENERAL DESCRIPTION
The MSM80C154S/MSM83C154S, designed for the high speed version of the existing MSM80C154/MSM83C154, is a higher performance 8-bit microcontroller providing low-power consumption. The MSM80C154S/MSM83C154S covers the functions and operating range of the existing MSM80C154/83C154/80C51F/80C31F. The MSM80C154S is identical to the MSM83C154S except it does not contain the internal program memory (ROM).
FEATURES
* Operating range Operating frequency
Operating voltage Operating temperature
* Fully static circuit * Upward compatible with the MSM80C51F/80C31F * On-chip program memory : 16K words x 8 bits ROM (MSM83C154S only) * On-chip data memory : 256 words x 8 bits RAM * External program memory address space : 64K bytes ROM (Max) * External data memory address space : 64K bytes RAM * I/O ports : 4 ports x 8 bits (Port 1, 2, 3, impedance programmable) : 32 * 16-bit timer/counters :3 * Multifunctional serial port : I/O Expansion mode : UART mode (featuring error detection) * 6-source 2-priority level Interrupt and multi-level Interrupt available by programming IP and IE registers * Memory-mapped special function registers * Bit addressable data memory and SFRs * Minimum instruction cycle : 500 ns @ 24 MHz operation * Standby functions : Power-down mode (oscillator stop) Activated by software or hardware; providing ports with floating or active status The software power-down stet mode is terminated by interrupt signal enabling execution from the interrupted address.
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: 0 to 3 MHz (Vcc=2.2 to 6.0 V) 0 to 12 MHz (Vcc=3.0 to 6.0 V) 0 to 24 MHz (Vcc=4.5 to 6.0 V) : 2.2 to 6.0 V : -40 to +85C (Operation at +125C conforms to the other specification.)
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Semiconductor * Package options 40-pin plastic DIP (DIP40-P-600-2.54)
MSM80C154S/83C154S
:
44-pin plastic QFP (QFP44-P-910-0.80-2K) : 44-pin QFJ (QFJ44-P-S650-1.27) 44-pin TQFP (TQFP44-P-1010-0.80-K) : :
(Product name: MSM80C154SRS/ MSM83C154S-xxxRS) (Product name: MSM80C154SGS-2K/ MSM83C154S-xxxGS-2K) (Product name: MSM80C154SJS/ MSM83C154S-xxxJS) (Product name: MSM80C154STS-K/ MSM83C154S-xxxTS-K) xxx: indicates the code number
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BLOCK DIAGRAM (MSM83C154S)
Semiconductor
PORT 2
P2.0
P2.7
DPH ADDRESS DECODER
CONTROL
SIGNAL
R/W
SIGNAL
PORT 0
P0.0
ROM DPL 16K WORDS x 8BITS PLA
P0.7 XTAL1 OSC and TIMING XTAL2 ALE PSEN EA RESET
PCHL
PCLL
SPECIAL FUNCTION REGISTER ADDRESS DECODER AIR C-ROM
PCH PCON
PCL
SENSE AMP
SP
IR
IOCON
T2CON
TL2
TH2
R/W AMP RAM 256 WORDS x 8BITS
ACC
TR2
TR1
PORT 1
P1.0
RAMDP PSW BR ALU
TIMER/ COUNTER 2
RCAP2L
RCAP2H
P1.7
MSM80C154S/83C154S
PORT 3
P3.0
TH1
TL1
TH0
TL0
TMOD
TCON
IE INTERRUPT
IP
SBUF(T)
SBUF(R) SERIAL IO
SCON
P3.7
TIMER/COUNTER 0 & 1
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Semiconductor
MSM80C154S/83C154S
PIN CONFIGURATION (TOP VIEW)
P1.0/T2 P1.1/T2EX P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 RESET
1 2 3 4 5 6 7 8 9
40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21
VCC P0.0 P0.1 P0.2 P0.3 P0.4 P0.5 P0.6 P0.7 EA ALE PSEN P2.7 P2.6 P2.5 P2.4 P2.3 P2.2 P2.1 P2.0
P3.0/RXD 10 P3.1/TXD 11 P3.2/INT0 12 P3.3/INT1 13 P3.4/T0 14 P3.5/T1/HPDI 15 P3.6/WR 16 P3.7/RD 17 XTAL2 18 XTAL1 19 VSS 20
40-Pin Plastic DIP
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Semiconductor
MSM80C154S/83C154S
PIN CONFIGURATION (Continued)
P1.5 P1.6 P1.7 RESET P3.0/RXD NC P3.1/TXD P3.2/INT0 P3.3/INT1
P3.4/T0 10 P3.5/T1/HPDI 11
44 P1.4 43 P1.3 42 P1.2 41 P1.1 40 P1.0 1 2 3 4 5 6 7 8 9 P3.6/WR 12 P3.7/RD 13 XTAL2 14 XTAL1 15 VSS 16
37 P0.0
36 P0.1
35 P0.2
34 P0.3 33 P0.4 32 P0.5 31 P0.6 30 P0.7 29 EA 28 NC 27 ALE 26 PSEN 25 P2.7 24 P2.6 23 P2.5 P2.4 22
VSS 17
P2.0 18
38 VCC
39 NC
P2.1 19
P2.2 20
NC : No-connection pin 44-Pin Plastic QFP
P2.3 21
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Semiconductor
MSM80C154S/83C154S
P1.5 P1.6 P1.7 RESET P3.0/RXD NC P3.1/TXD P3.2/INT0 P3.3/INT1
P3.4/T0 10 P3.5/T1/HPDI 11
44 P1.4 43 P1.3 42 P1.2 41 P1.1 40 P1.0 1 2 3 4 5 6 7 8 9 P3.6/WR 12 P3.7/RD 13 XTAL2 14 XTAL1 15 VSS 16
37 P0.0
36 P0.1
35 P0.2
34 P0.3 33 P0.4 32 P0.5 31 P0.6 30 P0.7 29 EA 28 NC 27 ALE 26 PSEN 25 P2.7 24 P2.6 23 P2.5 P2.4 22
VSS 17
P2.0 18
38 VCC
39 NC
P2.1 19
P2.2 20
NC : No-connection pin 44-Pin Plastic TQFP
P2.3 21
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Semiconductor
MSM80C154S/83C154S
PIN CONFIGURATION (Continued)
P0.3 40 P0.2 41 P0.1 42 P0.0 43 VCC 44 NC 1 P1.0/T2 2 P1.1/T2EX 3 P1.2 4 P1.3 5 P1.4 6
P3.0/RXD 11
P3.1/TXD 13
P3.2/INT0 14
P3.3/INT1 15
P3.4/T0 16
NC : No-connection pin 44-Pin Plastic QFJ
P3.5/T1/HPDI 17
,
39 P0.4 38 P0.5 37 P0.6 36 P0.7 34 NC 35 EA RESET 10 P1.5 7 P1.6 8 P1.7 9 NC 12
32 PSEN
31 P2.7
30 P2.6
29 P2.5
33 ALE
28 P2.4 27 P2.3 26 P2.2 25 P2.1 24 P2.0 23 NC 22 VSS 21 XTAL1 20 XTAL2 19 P3.7/RD 18 P3.6/WR
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Semiconductor
MSM80C154S/83C154S
PIN DESCRIPTIONS
Symbol P0.0 to P0.7 Descriptipn Bidirectional I/O ports. They are also the data/address bus (input/output of data and output of lower 8-bit address when external memory is accessed). They are open-drain outputs when used as I/O ports, but 3-state outputs when used as data/address bus. P1.0 to P1.7 are quasi-bidirectional I/O ports. They are pulled up internally when used as input ports. Two of them have the following secondary functions: *P1.0 (T2) : used as external clock input pins for the timer/counter 2. *P1.1 (T2EX) : used as trigger input for the timer/counter 2 to be reloaded or captured; causing the timer/counter 2 interrupt. P2.0 to P2.7 are quasi-bidirectional I/O ports. They also output the higher 8-bit address when an external memory is accessed. They are pulled up internally when used as input ports. P3.0 to P3.7 are quasi-bidirectional I/O ports. They are pulled up internally when used as input ports. They also have the following secondary functions: *P3.0 (RXD) Serial data input/output in the I/O expansion mode and serial data input in the UART mode when the serial port is used. *3.1 (TXD) Synchronous clock output in the I/O expansion mode and serial data output in the UART mode when the serial port is used. *3.2 (INT0) Used as input pin for the external interrupt 0, and as count-up control pin for the timer/counter 0. *3.3 (INT1) Used as input pin for the external interrupt 1, and as count-up control pin for the timer/counter 1. *3.4 (T0) Used as external clock input pin for the timer/counter 0. *3.5 (T1) Used as external clock input pin for the timer/counter 1 and power-down-mode control input pin. *3.6 (WR) Output of the write-strobe signal when data is written into external data memory. *3.7 (RD) Output of the read-strobe signal when data is read from external data memory. Address latch enable output for latching the lower 8-bit address during external memory access. Two ALE pulses are activated per machine cycle except during external data memory access at which time one ALE pulse is skipped. Program store enable output which enables the external memory output to the bus during external program memory access. Two PSEN pulses are activated per machine cycle except during external data memory access at which two PSEN pulses are skipped. When EA is held at "H" level, the MSM 83C154S executes instructions from internal program memory at address 0000H to 3FFFH, and executes instructions from external program memory above address 3FFFH. When EA is held at "L" level, the MSM80C154S/MSM83C154S executes instructions from external program memory for all addresses.
P1.0 to P1.7
P2.0 to P2.7 P3.0 to P3.7
ALE
PSEN
EA
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Semiconductor
MSM80C154S/83C154S
PIN Descriptions (Continued)
Symbol RESET Descriptipn If this pin remains "H" for at least one machine cycle, the MSM80C154S/MSM83C154S is reset. Since this pin is pulled down internally, a power-on reset is achieved by simply connecting a capacitor between VCC and this pin. Oscillator inverter input pin. External clock is input through XTAL1 pin. Oscillator inverter output pin. Power supply pin during both normal operation and standby operations. GND pin.
XTAL1 XTAL2 VCC VSS
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Semiconductor
MSM80C154S/83C154S
REGISTERS
Diagram of Special Function Registers
REGISTER NAME IOCON B ACC PSW TH2 TL2 RCAP2H RCAP2L T2CON IP P3 IE P2 SBUF SCON P1 TH1 TH0 TL1 TL0 TMOD TCON PCON DPH DPL SP P0 87 86 85 84 83 82 81 80 8F 8E 8D 8C 8B 8A 89 88 9F 97 9E 96 9D 95 9C 94 9B 93 9A 92 99 91 98 90 CF BF B7 AF A7 CE BE B6 AE A6 CD BD B5 AD A5 CC BC B4 AC A4 CB BB B3 AB A3 CA BA B2 AA A2 C9 B9 B1 A9 A1 C8 B8 B0 A8 A0 BIT ADDRESS b4 b3 FC F4 E4 D4 FB F3 E3 D3 DIRECT ADDRESS 0F8H (248) 0F0H (240) 0E0H (224) 0D0H (208) 0CDH (205) 0CCH (204) 0CBH (203) 0CAH (202) 0C8H (200) 0B8H (184) 0B0H (176) 0A8H (168) 0A0H (160) 99H (153) 98H (152) 90H (144) 8DH (141) 8CH (140) 8BH (139) 8AH (138) 89H (137) 88H (136) 87H (135) 83H (131) 82H (130) 81H (129) 80H (128)
b7 FF F7 E7 D7
b6 FE F6 E6 D6
b5 FD F5 E5 D5
b2 FA F2 E2 D2
b1 F9 F1 E1 D1
b0 F8 F0 E0 D0
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Semiconductor Special Function Registers Timer mode register (TMOD)
MSB 7 GATE M1 0 0 1 TMOD.1 M1 1 6 C/T M0 0 1 0 1 5 M1 4 M0 3 GATE
MSM80C154S/83C154S
NAME TMOD BIT LOCATION TMOD.0
ADDRESS 89H FLAG M0
LSB 2 C/T 1 M1 0 M0
FUNCTION Timer/counter 0 mode setting 8-bit timer/counter with 5-bit prescalar. 16-bit timer/counter. 8-bit timer/counter with 8-bit auto reloading. Timer/counter 0 separated into TLO (8-bit) timer/counter and TH0 (8-bit) timer/counter. TF0 is set by TL0 carry, and TF1 is set by TH0 carry.
TMOD.2
C/T
TMOD.3
GATE
TMOD.4
M0
Timer/counter 0 count clock designation control bit. XTAL1*2 divided by 12 clocks is the input applied to timer/counter 0 when C/T = "0". The external clock applied to the T0 pin is the input applied to timer/counter 0 when C/T = "1". When this bit is "0", the TR0 bit of TCON (timer control register) is used to control the start and stop of timer/counter 0 counting. If this bit is "1", timer/counter 0 starts counting when both the TR0 bit of TCON and INT0 pin input signal are "1", and stops counting when either is changed to "0". Timer/counter 1 mode setting M1 M0 0 0 1 1 0 1 0 1 8-bit timer/counter with 5-bit prescalar. 16-bit timer/counter 8-bit timer/counter with 8-bit auto reloading. Timer/counter 1 operation stopped.
TMOD.5 TMOD.6
M1 C/T
TMOD.7
GATE
Timer/counter 1 count clock designation control bit. XTAL1*2 divided by 12 clocks is the input applied to timer/counter 1 when C/T = "0". The external clock applied to the T1 pin is the input applied to timer/counter 1 when C/T = "1". When this bit is "0", the TR1 bit of TCON is used to control the start and stop of timer/counter 1 counting. If this bit is "1", timer/counter 1 starts counting when both the TR1 bit of TCON and INT1 pin input signal are "1", and stops counting when either is changed to "0".
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Semiconductor Power control register (PCON)
MSB 7 SMOD 6 HPD 5 RPD 4 -- 3 GF1
MSM80C154S/83C154S
NAME PCON BIT LOCATION PCON.0
ADDRESS 87H FLAG IDL
LSB 2 GF0 1 PD 0 IDL
FUNCTION IDLE mode is set when this bit is set to "1". CPU operations are stopped when IDLE mode is set, but XTAL1*2, timer/counters 0, 1 and 2, the interrupt circuits, and the serial port remain active. IDLE mode is cancelled when the CPU is reset or when an interrupt is generated. PD mode is set when this bit is set to "1". CPU operations and XTAL1*2 are stopped when PD mode is set. PD mode is cancelled when the CPU is reset or when an interrupt is generated. General purpose bit. General purpose bit. Reserved bit. The output data is "1", if the bit is read. This bit is used to specify cancellation of CPU power down mode (IDLE or PD) by an interrupt signal. Power-down mode cannot be cancelled by an interrupt signal if the interrupt is not enabled by IE (interrupt enable register) when this bit is "0". If the interrupt flag is set to "1" by an interrupt request signal when this bit is "1" (even if interrupt is disabled), the program is executed from the next address of the power-down-mode setting instruction. The flag is reset to "0" by software. The hard power-down setting mode in enabled when this bit is set to "1". If the level of the power failure detect signal applied to the HPDI pin (pin 3.5) is changed from "1" to "0" when this bit is "1", XTAL1*2 oscillation is stopped and the system is put into hard power down mode. HPD mode is cancelled when the CPU is reset. When the timer/counter 1 carry signal is used as a clock in mode 1, 2 or 3 of the serial port, this bit has the following functions. The serial port operation clock is reduced by 1/2 when the bit is "0" for delayed processing. When the bit is "1", the serial port operation clock is normal for faster processing.
PCON.1
PD
PCON.2 PCON.3 PCON.4 PCON.5
GF0 GF1 -- RPD
PCON.6
HPD
PCON.7
SMOD
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Semiconductor Timer control register (TCON)
MSB 7 TF1 6 TR1 5 TF0 4 TR0 3 IE1
MSM80C154S/83C154S
NAME TCON BIT LOCATION TCON.0 TCON.1
ADDRESS 88H FLAG IT0 IE0
LSB 2 IT1 1 IE0 0 IT0
FUNCTION External interrupt 0 signal is used in level-detect mode when this bit is "0" and in trigger detect mode when "1". Interrupt request flag for external interrupt 0. The bit is reset automatically when an interrupt is serviced. The bit can be set and reset by software when IT0 = "1". External interrupt 1 signal is used in level detect mode when this bit is "0", and in trigger detect mode when "1". Interrupt request flag for external interrupt 1. The bit is reset automatically when an interrupt is serviced. The bit can be set and reset by software when IT1 = "1". Counting start and stop control bit for timer/counter 0. Timer/counter 0 starts counting when this bit is "1", and stops counitng when "0". Interrupt request flag for timer interrupt 0. The bit is reset automatically when an interrupt is serviced. The bit is set to "1" when a carry signal is generated from timer/counter 0. Counting start and stop control bit for timer/counter 1. The timer/counter 1 starts counting when this bit is "1", and stops counting when "0". Interrupt request flag for timer interrupt 1. The bit is reset automatically when interrupt is serviced. The bit is set to "1" when carry signal is generated from timer/counter 1.
TCON.2 TCON.3
IT1 IE1
TCON.4 TCON.5
TR0 TF0
TCON.6 TCON.7
TR1 TF1
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Semiconductor Serial port control register (SCON)
MSB 7 SM0 6 SM1 5 SM2 4 REN 3 TB8
MSM80C154S/83C154S
NAME SCON BIT LOCATION SCON.0
ADDRESS 98H FLAG RI
LSB 2 RB8 1 TI 0 RI
FUNCTION "End of serial port reception" interrupt request flag. This flag must be reset by software during interrupt service routine. This flag is set after the eighth bit of data has been received when in mode 0, or by the STOP bit when in any other mode. In mode 2 or 3, however, RI is not set if the RB8 data is "0" with SM2 = "1". RI is set in mode 1 if STOP bit is received when SM2 = "1". "End of serial port tramsmission" interrupt request flag. This flag must be reset by software during interrupt service routine. This flag is set after the eighth bit of data has been sent when in mode 0, or after the last bit of data has been sent when in any other mode. The ninth bit of data received in mode 2 or 3 is passed to RB8. The STOP bit is applied to RB8 if SM2 = "0" when in mode 1. RB8 can not be used in mode 0. The TB8 data is sent as the ninth data bit when in mode 2 or 3. Any desired data can be set in TB8 by software. Reception enable control bit. No reception when REN = "0". Reception enabled when REN = "1". If the ninth bit of received data is "0" with SM2 = "1" in mode 2 or 3, the "end of reception" signal is not set in the RI flag. The "end of reception" signal set in the RI flag if the STOP bit is not "1" when SM2 = "1" in mode 1. SM0 0 0 SM1 0 1 0 1 MODE 0 1 2 3 8-bit shift register I/O 8-bit UART variable baud rate 9-bit UART 1/32 XTAL1, 1/64 XTAL1 baud rate 9-bit UART variable baud rate
SCON.1
TI
SCON.2
RB8
SCON.3 SCON.4
TB8 REN
SCON.5
SM2
SCON.6
SM1
SCON.7
SM0
1 1
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Semiconductor
MSM80C154S/83C154S
Interrupt enable register (IE)
MSB 7 EA 6 -- 5 ET2 4 ES 3 ET1 2 EX1 1 ET0 LSB 0 EX0
NAME IE BIT LOCATION IE.0
ADDRESS 0A8H FLAG EX0
FUNCTION Interrupt control bit for external interrupt 0. Interrupt disabled when bit is "0". Interrupt enabled when bit is "1". Interrupt control bit for timer interrupt 0. Interrupt disabled when bit is "0". Interrupt enabled when bit is "1". Interrupt control bit for external interrupt 1. Interrupt disabled when bit is "0". Interrupt enabled when bit is "1". Interrupt control bit for timer interrupt 1. Interrupt disabled when bit is "0". Interrupt enabled when bit is "1". Interrupt control bit for serial port. Interrupt disabled when bit is "0". Interrupt enabled when bit is "1". Interrupt control bit for timer interrupt 2. Interrupt disabled when bit is "0". Interrupt enabled when bit is "1". Reserved bit. The output data is "1" if the bit is read. Overall interrupt control bit. All interrupts are disabled when bit is "0". All interrupts are controlled by IE.0 thru IE.5 when bit is "1".
IE.1
ET0
IE.2
EX1
IE.3
ET1
IE.4
ES
IE.5
ET2
IE.6 IE.7
-- EA
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Semiconductor
MSM80C154S/83C154S
Interrupt priority register (IP)
MSB 7 PCT 6 -- 5 PT2 4 PS 3 PT1 2 PX1 1 PT0 LSB 0 PX0
NAME IP BIT LOCATION IP.0 IP.1 IP.2 IP.3 IP.4 IP.5 IP.6 IP.7
ADDRESS 0B8H FLAG PX0 PT0 PX1 PT1 PS PT2 -- PCT
FUNCTION Interrupt priority bit for external interrupt 0. Priority is assigned when bit is "1". Interrupt priority bit for timer interrupt 0. Priority is assigned when bit is "1". Interrupt priority bit for external interrupt 1. Priority is assigned when bit is "1". Interrupt priority bit for timer interrupt 1. Priority is assigned when bit is "1". Interrupt priority bit for serial port. Priority is assigned when bit is "1". Interrupt priority bit for timer interrupt 2. Priority is assigned when bit is "1". Reserved bit. The output data is "1" if the bit is read. Priority interrupt circuit control bit. The priority register contents are valid and priority assigned interrupts can be processed when this bit is "0". When the bit is "1", the priority interrupt circuit is stopped, and interrupts can only be controlled by the interrupt enable register (IE).
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Semiconductor Program status word register (PSW)
MSB 7 CY 6 AC 5 F0 4 RS1 3 RS0
MSM80C154S/83C154S
NAME PSW BIT LOCATION PSW.0
ADDRESS 0D0H FLAG P
LSB 2 OV 1 F1 0 P
FUNCTION Accumulator (ACC) parity indicator. This bit is "1" when the "1" bit number in the accumulator is an odd number, and "0" when an even number. User flag which may be set to "0" or "1" as desired by the user. Overflow flag which is set if the carry C6 from bit 6 of the ALU or CY is "1" as a result of an arithmetic operation. The flag is also set to "1" if the resultant product of executing multiplication instruction (MUL AB) is greater than 0FFH, but is reset to "0" if the product is less than or equal to 0FFH. RAM register bank switch RS1 0 RS0 0 1 0 1 BANK 0 1 2 3 00H - 07H 08H - 0FH 10H - 17H 18H - 1FH RAM ADDRESS
PSW.1 PSW.2
F1 OV
PSW.3
RS0
PSW.4
RS1
0 1 1
PSW.5 PSW.6
F0 AC
User flag which may be set to "0" or "1" as desired by the user. Auxiliary carry flag. This flag is set to "1" if a carry C3 is generated from bit 3 of the ALU as a result of executing an arithmetic operation instruction. In all other cases, the flag is reset to "0". Main carry flag. This flag is set to "1" if a carry C7 is generated from bit 7 of the ALU as result of executing an arithmetic operation instruction. If a carry C7 is not generated, the flag is reset to "0".
PSW.7
CY
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Semiconductor
MSM80C154S/83C154S
I/O control register (IOCON)
MSB 7 -- 6 T32 5 SERR 4 IZC 3 P3HZ 2 P2HZ 1 P1HZ LSB 0 ALF
NAME IOCON BIT LOCATION IOCON.0
ADDRESS 0F8H FLAG ALF
FUNCTION If CPU power down mode (PD, HPD) is activated with this bit set to "1", the outputs from ports 0, 1, 2, and 3 are switched to floating status. When this bit is "0", ports 0, 1, 2, and 3 are in output mode. Port 1 becomes a high impedance input port when this bit is "1". Port 2 becomes a high impedance input port when this bit is "1". Port 3 becomes a high impedance input port when this bit is "1". The 10 kW pull-up resistor for ports 1, 2, and 3 is switched off when this bit is "1", leaving only the 100 kW pull-up resistor. Serial port reception error flag. This flag is set to "1" if an overrun or framing error is generated when data is received at a serial port. The flag is reset by software. Timer/counters 0 and 1 are connected serially to from a 32-bit timer/counter when this bit is set to "1". TF1 of TCON is set if a carry is generated in the 32-bit timer/counter. Leave this bit at "0".
IOCON.1 IOCON.2 IOCON.3 IOCON.4 IOCON.5
P1HZ P2HZ P3HZ IZC SERR
IOCON.6
T32
IOCON.7
--
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Semiconductor Timer 2 control register (T2CON)
MSB 7 TF2 6 EXF2 5 RCLK 4 TCLK 3 EXEN2
MSM80C154S/83C154S
NAME T2CON BIT LOCATION T2CON.0
ADDRESS 0C8H FLAG CP/RL2
LSB 2 TR2 1 C/T2 0 CP/RL2
FUNCTION Capture mode is set when TCLK + RCLK = "0" and CP/RL2 = "1". 16-bit auto reload mode is set when TCLK + RCLK = "0" and CP/RL2 = "0". CP/RL2 is ignored when TCLK + RCLK = "1". Timer/counter 2 count clock designation control bit. The internal clocks (XTAL1*2 / 12, XTAL1*2 / 2) are used when this bit is "0", and the external clock applied to the T2 pin is passed to timer/counter 2 when the bit is "1". Timer/counter 2 counting start and stop control bit. Timer/counter 2 commences counting when this bit is "1" and stops counting when "0". T2EX timer/counter 2 external control signal control bit. Input of the T2EX signal is disabled when this bit is "0", and enabled when "1". Serial port transmit circuit drive clock control bit. Timer/counter 2 is switched to baud rate generator mode when this bit is "1", and the timer/counter 2 carry signal becomes the serial port transmit clock. Note, however, that the serial ports can only use the timer/counter 2 carry signal in serial port modes 1 and 3. Serial port receive circuit drive clock control bit. Timer/counter 2 is switched to baud rate generator mode when this bit is "1", and the timer/counter 2 carry signal becomes the serial port transmit clock. Note, however, that the serial ports can only use the timer/counter 2 carry signal in serial port modes 1 and 3. Timer/counter 2 external flag. This bit is set to "1" when the T2EX timer/counter 2 external control signal level is changed from "1" to "0" while EXEN2 = "1". This flag serves as the timer interrupt 2 request signal. If an interrupt is generated, EXF2 must be reset to "0" by software. Timer/counter 2 carry flag. This bit is set to "1" by a carry signal when timer/counter 2 is in 16-bit auto reload mode or in capture mode. This flag serves as the timer interrupt 2 request signal. If an interrupt is generated, TF2 must be reset to "0" by software.
T2CON.1
C/T2
T2CON.2
TR2
T2CON.3 T2CON.4
EXEN2 TCLK
T2CON.5
RCLK
T2CON.6
EXF2
T2CON.7
TF2
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Semiconductor
MSM80C154S/83C154S
MEMORY MAPS
Program Area
65535
MSM83C154S EXTERNAL ROM AREA
0FFFFH
Timer interrupt 2 start
43
002BH
S I/O interrupt start
35
0023H
MSM80C154S EXTERNAL ROM AREA
Timer interrupt 1 start
27
001BH
External interrupt 1 start 16384 16383 4000H 3FFFH Timer interrupt 0 start
19
0013H
MSM83C154S INTERNAL ROM AREA
11
000BH
44 43
002CH 002BH
External interrupt 0 start
3 2 1
0003H 0002H 0001H 0000H
0
7 6 5 4 3 21 0
CPU reset start
0
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Semiconductor
MSM80C154S/83C154S
Internal Data Memory and Special Function Register Layout Diagram
HEX 0FF IOCON B ACC PSW TH2 TL2 RCAP2H RCAP2L T2CON IP P3 IE P2 SBUF SCON P1 TH1 TH0 TL1 TL0 TMOD TCON PCON DPH DPL SP P0 FFH~F8H F7H~F0H E7H~E0H D7H~D0H 248(0F8H) 240(0F0H) 224(0E0H) 208(0D0H) 205(0CDH) 204(0CCH) 203(OCBH) 202(0CAH) 200(0C8H) 184(0B8H) 176(0B0H) 168(0A8H) 160(0A0H) 153( 99H) 152( 98H) 144( 90H) 141( 8DH) 140( 8CH) 139( 8BH) 138( 8AH) 137( 89H) 136( 88H) 135( 87H) 131( 83H) 130( 82H) 129( 81H) 128( 80H)
REGISTER INDIRECT ADDRESSING
USER DATA RAM
SPECIAL FUNCTION REGISTERS
CFH~C8H BFH~B8H B7H~B0H AFH~A8H A7H~A0H 9FH~98H 97H~90H
8FH~88H
80 7F USER DATA RAM 30 2F 20 1F 18 17 10 0F 08 07 00 7F BIT RAM 7 R7 R0 R7 R0 R7 R0 R7 R0 0 BANK3 BANK2 BANK1 78
87H~80H
BIT ADDRESSING
DATA ADDRESSING BANK0
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Semiconductor Diagram of Internal Data Memory (RAM)
0FFH 80H 7FH 30H 2FH 2EH 2DH 2CH 2BH 2AH 29H 28H 27H 26H 25H 24H 23H 22H 21H 20H 1FH Bank 3 18H 17H Bank 2 10H 0FH Bank 1 08H 07H Bank 0 00H 0 8 7 16 15 24 23 7F 77 6F 67 5F 57 4F 47 3F 37 2F 27 1F 17 0F 07 7E 76 6E 66 5E 56 4E 46 3E 36 2E 26 1E 16 0E 06 7D 75 6D 65 5D 55 4D 45 3D 35 2D 25 1D 15 0D 05
MSM80C154S/83C154S
USER DATA RAM USER DATA RAM 7C 74 6C 64 5C 54 4C 44 3C 34 2C 24 1C 14 0C 04 7B 73 6B 63 5B 53 4B 43 3B 33 2B 23 1B 13 0B 03 7A 72 6A 62 5A 52 4A 42 3A 32 2A 22 1A 12 0A 02 79 71 69 61 59 51 49 41 39 31 29 21 19 11 09 01 78 70 68 60 58 50 48 40 38 30 28 20 18 10 08 00
255 128 127 48 47 46 45 44 43
41 40 39 38 37 36 35 34 33 32
REGISTERS 0-7 DIRIECT ADDRESSING
31
BIT ADDRESSING
42
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REGISTER 0, 1, INDIRECT ADDRESSING
DATA ADDRESSING
Semiconductor
MSM80C154S/83C154S
ABSOLUTE MAXIMUM RATINGS
Parameter Supply voltage Input voltage Storage temperature Symbol VCC VI TSTG Condition Ta=25C Ta=25C -- Rating -0.5 to 7 -0.5 to VCC+0.5 -55 to +150 Unit V V C
RECOMMENDED OPERATING CONDITIONS
Parameter Power supply voltage Memory retension voltage Oxcillation frequency External clock operating frequency Ambient temperature Symbol VCC VCC fOSC fEXTCLK Ta Condition See below. fOSC=0 Hz (Oscillation stop) See below. See below. -- Range 2.0 to 6.0 2.0 to 6.0 1 to 24 0 to 24 -40 to +85 Unit V V MHz MHz C
*1 Depends on the specifications for the oscillator or ceramic resonater.
12
1
5 4
tCY (ms)
3
3 2 6
1
0.6 0.5
12 20 24 2
2.2
3
4
5
6
Power Supply Voltage (VCC)
fOSC fEXTCLK (MHz)
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Semiconductor
MSM80C154S/83C154S
ELECTRICAL CHARACTERISTICS
DC Characteristics 1
(VCC=4.0 to 6.0 V, VSS=0 V, Ta=-40 to +85C) MeasMin. Typ. Max. Unit uring circuit -0.5 0.2 VCC+0.9 0.7 VCC -- -- 2.4 0.75 VCC 0.9 VCC 2.4 0.75 VCC 0.9 VCC -5 -- -- 20 -- -- -- -- -- -- -- -- -- -- -- -- -- -20 -190 -- 40 -- 1 0.2 VCC-0.1 VCC+0.5 VCC+0.5 0.45 0.45 -- -- -- -- -- -- -80 -500 10 125 10 50 V V V V V 1 V V V V V V mA 2 mA mA kW pF mA 3 2 -- 4
Parameter Input Low Voltage Input High Voltage Input High Voltage Output Low Voltage (PORT 1, 2, 3) Output Low Voltage (PORT 0, ALE, PSEN) Output High Voltage (PORT 1, 2, 3)
Symbol VIL VIH VIH1 VOL VOL1
Condition -- Except XTAL1, EA, and RESET XTAL1, RESET and EA IOL=1.6 mA IOL=3.2 mA IOH=-60 mA
VOH
VCC=5 V10% IOH=-30 mA IOH=-10 mA IOH=-400 mA
Output High Voltage (PORT 0, ALE, PSEN) Logical 0 Input Current/ Logical 1 Output Current/ (PORT 1, 2, 3) Logical 1 to 0 Transition Output Current (PORT 1, 2, 3) Input Leakage Current (PORT 0 floating, EA) RESET Pull-down Resistance Pin Capacitance Power Down Current
VOH1
VCC=5 V10% IOH=-150 mA IOH=-40 mA VI=0.45 V VO=0.45 V VI=2.0 V VSS < VI < VCC -- Ta=25C, f=1 MHz (except XTAL1) --
IIL / IOH ITL ILI RRST CIO IPD
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Semiconductor Maximum power supply current normal operation ICC (mA)
VCC Freq 1 MHz 3 MHz 12 MHz 16 MHz 20 MHz 2.2 3.9 12.0 16.0 19.0 3.1 5.2 16.0 20.0 25.0 4.1 7.0 20.0 25.0 30.0 4V 5V 6V
MSM80C154S/83C154S
VCC Freq 24 MHz
4.5 V 25.0
5V 29.0
6V 35.0
Maximum power supply current idle mode ICC (mA)
VCC Freq 1 MHz 3 MHz 12 MHz 16 MHz 20 MHz 0.8 1.2 3.1 3.8 4.5 1.2 1.7 4.4 5.5 6.4 1.6 2.3 5.9 7.3 8.6 4V 5V 6V
VCC Freq 24 MHz
4.5 V 6.4
5V 7.4
6V 9.8
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Semiconductor
MSM80C154S/83C154S
DC Characteristics 2
(VCC=2.2 to 4.0 V, VSS=0 V, Ta=-40 to +85C) MeasMin. Typ. Max. Unit uring circuit -0.5 0.25 VCC+0.9 -- -- -- -- -- -- -- -10 -80 -- 40 -- 1 0.25 VCC-0.1 VCC+0.5 VCC+0.5 0.1 0.1 -- -- -40 -300 10 125 10 10 V V V V V 1 VOH VOH1 IIL / IOH ITL ILI RRST CIO IPD IOH=-5 mA IOH=-20 mA VI=0.1 V VO=0.1 V VI=1.9 V VSS < VI < VCC -- Ta=25C, f=1 MHz (except XTAL1) -- 0.75 VCC 0.75 VCC -5 -- -- 20 -- -- V V mA 2 mA mA kW pF mA 3 2 -- 4
Parameter Input Low Voltage Input High Voltage Input High Voltage Output Low Voltage (PORT 1, 2, 3) Output Low Voltage (PORT 0, ALE, PSEN) Output High Voltage Output High Voltage (PORT 1, 2, 3) (PORT 0, ALE, PSEN) Logical 0 Input Current/ Logical 1 Output Current/ (PORT 1, 2, 3) Logical 1 to 0 Transition Output Current (PORT 1, 2, 3) Input Leakage Current (PORT 0 floating, EA) RESET Pull-down Resistance Pin Capacitance Power Down Current
Symbol VIL VIH VIH1 VOL VOL1
Condition -- Except XTAL1, EA, and RESET
XTAL1, RESET, and EA 0.6 VCC+0.6 IOL=10 mA IOL=20 mA -- --
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Semiconductor Maximum power supply current normal operation ICC (mA)
VCC Freq 1 MHz 3 MHz 12 MHz 16 MHz 0.9 1.8 -- -- 1.4 2.4 8.0 -- 2.2 4.3 12.0 16.0 2.2 V 3.0 V 4.0 V
MSM80C154S/83C154S
Maximum power supply current idle mode ICC (mA)
VCC Freq 1 MHz 3 MHz 12 MHz 16 MHz 0.3 0.5 -- -- 0.5 0.8 2.0 -- 0.8 1.2 3.1 3.8 2.2 V 3.0 V 4.0 V
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Semiconductor
MSM80C154S/83C154S
Measuring circuits
1 2
VCC
OUTPUT INPUT (*3)
(*2) A IO
(*1)
INPUT
VCC
OUTPUT
VIH VIL
V
VA
VSS
VSS
3
4 A
VCC
OUTPUT INPUT (*3)
(*2)
INPUT (*3)
VCC VIH A
OUTPUT
VIH VIL
V
VSS
VIL
VSS
*1: Repeated for specified input pins. *2: Repeated for specified output pins. *3: Input logic for specified status.
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Semiconductor AC Characteristics (1) External program memory access AC characteristics
MSM80C154S/83C154S
VCC=2.2 to 6.0V, VSS=0V, Ta=-40C to +85C PORT 0, ALE, and PSEN connected with 100pF load, other connected with 80pF load Variable clock from*1 Parameter XTAL1, XTAL 2 Oscillation Cycle ALE Signal Width Address Setup Time (to ALE Falling Edge) Address Hold Time (from ALE Falling Edge) Instruction Data Read Time (from ALE Falling Edge) From ALE Falling Edge to PSEN Falling Edge PSEN Signal Width Instruction Data Read Time (from PSEN Falling Edge) Instruction Data Hold Time (from PSEN Rising Edge) Bus Floating Time after Instruction Data Read (from PSEN Rising Edge) Instruction Data Read Time (from Address Output) Bus Floating Time(PSEN Rising Edge from Address float) Address Output Time from PSEN Rising Edge Symble Min. tCLCL tLHLL tAVLL tLLAX tLLPL tLLPL tPLPH tPLIV tPXIX tPXIZ tAVIV tAZPL tPXAV 41.7 2tCLCL-40 1tCLCL-15 1tCLCL-35 -- 1tCLCL-30 3tCLCL-35 -- 0 -- -- 0 1tCLCL-20 1 to 24 MHz Max. 1000 -- -- -- 4tCLCL-100 -- -- 3tCLCL-45 -- 1tCLCL-20 5tCLCL-105 -- -- ns ns ns ns ns ns ns ns ns ns ns ns ns Unit
*1 The variable check is from 0 to 24 MHz when the external check is used.
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Semiconductor (2) External program memory read cycle
tLHLL ALE tAVLL tLLPL tPLPH tLLIV tPLIV PSEN
MSM80C154S/83C154S
tPXAV tPXIZ tLLAX tAZPL PORT0 A0 to A7 tAVIV tPXIX INSTR IN A0 to A7
PORT2
A8 to A15
A8 to A15
A8 to A15
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Semiconductor (3) External data memory access AC characteristics
MSM80C154S/83C154S
VCC=2.2 to 6.0V, VSS=0V, Ta=-40C to +85C PORT 0, ALE, and PSEN connected with 100pF load, other connected with 80pF load Variable clock from*1 Parameter XTAL1, XTAL2 Oscillator Cycle ALE Signal Width Address Setup Time (to ALE Falling Edge) Address Hold Time (from ALE Falling Edge) RD Signal Width WR Signal Width RAM Data Read Time (from RD Signal Falling Edge) RAM Data Read Hold Time (from RD Signal Rising Edge) Data Bus Floating Time (from RD Signal Rising Edge) RAM Data Read Time (from ALE Signal Falling Edge) RAM Data Read Time (from Address Output) RD/WR Output Time from ALE Falling Edge RD/WR Output Time from Address Output WR Output Time from Data Output Time from Data to WR Rising Edge Data Hold Time (from WR Rising Edge) Time from to Address Float RD Output Time from RD/WR Rising Edge to ALE Rising Edge Symbol Min. tCLCL tLHLL tAVLL tLLAX tRLRL tWLWH tRLDV tRHDX tRHDZ tLLDV tAVDV tLLWL tAVWL tQVWX tQVWH tWHQX tRLAZ tWHLH 41.7 2tCLCL-40 1tCLCL-15 1tCLCL-35 6tCLCL-100 6tCLCL-100 -- 0 -- -- -- 3tCLCL-40 *2 3tCLCL-100 4tCLCL-70 1tCLCL-40 7tCLCL-105 2tCLCL-50 0 1tCLCL-30 1 to 24 MHz Max. 1000 -- -- -- -- -- 5tCLCL-105 -- 2tCLCL-70 8tCLCL-100 9tCLCL-105 3tCLCL+40 -- -- -- -- -- 1tCLCL+40 *2 1tCLCL+100 ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns Unit
*1 The variable check is from 0 to 24 MHz when the external check is used. *2 For 2.2VCC<4 V
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Semiconductor (4) External data memory read cycle
tLHLL ALE
MSM80C154S/83C154S
tWHLH
PSEN tLLDV tLLWL RD tAVLL tLLAX tAZRL PORT 0 INSTR IN
A0 to A7 PCL A0 to A7 Rr or DPL
tRLRH
tRHDZ tRLDV tRHDX DATA IN tAVDV A8 to A15 PCH
A0 to A7 PCL
tAVWL A8 to A15 PCH
PORT 2
PCH
P2.0 to P2.7 DATA or A8 to A15 DPH
(5) External data memory write cycle
tLHLL ALE tWHLH
PSEN tLLWL WR tAVLL PORT 0 INSTR IN
A0 to A7 PCL
tWLWH
tLLAX tQVWX
tQVWH
tWHQX
A0 to A7 PCL
A0 to A7 Rr or DPL
DATA (ACC)
tAVWL PORT 2 A8 to A15 PCH A8 to A15 PCH P2.0 to P2.7 DATA or A8 to A15 DPH A8 to A15 PCH
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Semiconductor (6) Serial port (I/O Extension Mode) AC characteristics
MSM80C154S/83C154S
Parameter Serial Port Clock Cycle Time Output Data Setup to Clock Rising Edge Output Data Hold After Clock Rising Edge Input Data Hold After Clock Rising Edge Clock Rising Edge to Input Data Valid
Symbol tXLXL tQVXH tXHQX tXHDX tXHDV
(VCC=2.2 to 6.0V, VSS=0V, Ta=-40C to +85C) Min. Max. Unit 12tCLCL 10tCLCL-133 2tCLCL-75 0 -- -- -- -- -- 10tCLCL-133 ns ns ns ns ns
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Semiconductor
MACHINE CYCLE
ALE
tXLXL SHIFT CLOCK
tQVXH OUTPUT DATA
tXHQX
MSM80C154S/83C154S
tXHDV INPUT DATA
VALID VALID
tXHDX
VALID VALID VALID VALID VALID VALID
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Semiconductor (7) AC Characteristics Measuring Conditions 1.Input/output signal
VOH VIH TEST POINT VOL VIL VIL VIH
MSM80C154S/83C154S
VOH
VOL
*
The input signals in AC test mode are either VOH (logic "1") or VOL (logic "0") input signals where logic "1" corresponds to a CPU output signal waveform measuring point in excess of VIH, and logic "0" to a point below VIL.
2.Floating
VOH Floating VIH VIL VIH VIL VOH
VOL
VOL
*
The port 0 floating interval is measured from the time the port 0 pin voltage drops below VIH after sinking to GND at 2.4 mA when switching to floating status from a "1" output, and from the time the port 0 pin voltage exceeds VIL after connecting to a 400 mA source when switching to floating status from a "0" output.
(8) XTAL1 external clock input waveform conditions
Parameter External Clock Freq. Clock Pulse width 1 Clock Pulse width 2 Rise Time Fall Time Symbol 1/tCLCL tCHCx tCLCX tCLCH tCHCL Min. 0 15 15 -- -- Max. 24 -- -- 5 5 Unit MHz ns ns ns ns
External Clock Drive Waveform
0.7 VCC EXTERNAL OSCILLATOR SIGNAL
tCHCL
0.2 VCC - 0.1 tCLCX
tCLCH
tCHCX
tCLCL
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CYCLE M1
S2 S3 S4 S5 S6 S1 S2 S3 S4 S5 S6 S1 S2 S3 S4 S5 S6
M1
M2
M1
Basic timing
STEP
S1
S2
S3
S4
S5
S6
S1
Timing Diagram
XTAL 1
1
0
Semiconductor
ALE
1
0
PSEN
1
0
RD/WR DPL&Rr PCL PCH
,, ,, ,, ,, ,, ,, ,, ,,
1
0
PORT-0 DPH & PORT DATA PCH
1
0
PCL
PCL
ACC & RAM
PCL
PCL
,,
PCL PCH
,,
1
PORT-2
,, ,,
PCH
PCH
PCH
PCH
,, ,, ,,
,,
,,
0
,, ,, ,,
DATA STABLE
,, ,, ,, ,, ,, ,, ,, ,, ,,
,,
DATA STABLE
,, ,, ,, ,, ,, ,, ,, ,, ,
,,
,,
,,
1
,, ,, ,, ,,
,
,,
,,
CPUPORT
,, ,, ,, ,, ,, ,, ,, ,, ,, ,,
,,
0
,,
,,
,,
,,
,,
,,
,,
1
,, ,,
,, ,,
,,
PORTCPU PORT NEW DATA
,, ,, , ,,
PORT OLD DATA
,,
,,
,,
,,
0
Instruction decoding Instruction execution
Instruction decoding
Instruction decoding Instruction execution PC+1 PC+1 TM+1 TM+1
Instruction execution TM+1
PC+1
PC+1
PC+1
TM+1
Port output/input
External data memory instruction execution
Port output/input instruction execution
MSM80C154S/83C154S
instruction execution
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Semiconductor
MSM80C154S/83C154S
PACKAGE DIMENSIONS
(Unit : mm)
DIP40-P-600-2.54
Package material Lead frame material Pin treatment Solder plate thickness Package weight (g)
Epoxy resin 42 alloy Solder plating 5 mm or more 6.10 TYP.
Notes for Mounting the Surface Mount Type Package The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki's responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times).
37/40
Semiconductor
MSM80C154S/83C154S
(Unit : mm) QFP44-P-910-0.80-2K
Mirror finish
Package material Lead frame material Pin treatment Solder plate thickness Package weight (g)
Epoxy resin 42 alloy Solder plating 5 mm or more 0.41 TYP.
Notes for Mounting the Surface Mount Type Package The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki's responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times).
38/40
Semiconductor
MSM80C154S/83C154S
(Unit : mm)
QFJ44-P-S650-1.27
Mirror finish
Package material Lead frame material Pin treatment Solder plate thickness Package weight (g)
Epoxy resin Cu alloy Solder plating 5 mm or more 2.00 TYP.
Notes for Mounting the Surface Mount Type Package The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki's responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times).
39/40
Semiconductor
MSM80C154S/83C154S
(Unit : mm)
TQFP44-P-1010-0.80-K
Mirror finish
Package material Lead frame material Pin treatment Solder plate thickness Package weight (g)
Epoxy resin 42 alloy Solder plating 5 mm or more 0.28 TYP.
Notes for Mounting the Surface Mount Type Package The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki's responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times).
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